ASIC Architect R&D (M/F)

Eviden, part of the Atos Group, with an annual revenue of circa € 5 billion is a global leader in data-driven, trusted and sustainable digital transformation. As a next generation digital business with worldwide leading positions in digital, cloud, data, advanced computing and security, it brings deep expertise for all industries in more than 47 countries. By uniting unique high-end technologies across the full digital continuum with 47,000 world-class talents, Eviden expands the possibilities of data and technology, now and for generations to come.

In close collaboration with system hardware and software architects, you will define the functionalities of new generation products reflecting marketing requirements. You will be assisted by modeling and implementation experts to guarantee the performance and cost of the solution.

This position is in one of the Atos/Bull research and development centers, Clayes-sous-Bois or Bruyères-le-Châtel in Ile-de-France or Grenoble or Sophia.

Your role will include the following activities:

• Analyze AI and HPC use case requirements, bottlenecks, technology trends, and competitive landscape.

You will propose functionalities optimizing the performance of HPC applications executed on a supercomputer cluster embedding a high-performance network.

• Drive innovations in RDMA-based technologies for Ethernet or HPC beyond the state of the art.

• Create innovative, highly competitive & efficient solutions to customer’s problems within technological and budget constraints

• Prepare performance projections and cost assessments to support the decision-making process at each stage of the project

• Deliver clear, effective, and qualitative architecture specification documents. Drive the architecture quality assurance process.

• Work closely with the RTL design, verification and SW teams to optimize the solution. Support the development team at every stage of the ASIC design flow

• Work closely with European research centers and start-ups to define the next generation of interconnection technologies.

Your Profile:

• Education: Bac+5 or PhD, engineering school or university

• 5+ years of experience in hardware development preferably in an HPC or datacenter context.

• Solid knowledge with large scale, distributed, workloads such as AI training, scientific simulation, …

• Proven experience in creating a simple and efficient architecture which solves a customer problem

• Good knowledge or experience in one or more of the following areas would be appreciated:

o Ethernet network technologies, Infiniband, IP networks o Parallel & distributed applications

o x86, RISCV or ARM server architecture

o High speed interfaces (e.g. Ethernet, PCIe, CXL, UPI, NVlink, UCIe, UALink, DDR / LPDDR / HBM)

o Knowledge of administration and supervision of HPC or Ethernet networks.

o RTL design (Verilog, vhdl)

• Hands on – capable of creating a demonstrator, prototype or executable specification (SystemC, C, C++, Python).

• Excellent communication matched to different audiences (e.g. RTL designer, verification engineer, SW developer, researcher, marketing, …)

• Innovative, rigorous with solid methodology. Analytical skills, autonomy, good interpersonal and teamwork skills

• English proficiency, French is a plus Success factors

• You must have a strong focus on solving actual customer problems, efficient hardware design, underpinned by good systems knowledge.

• The quality of your relationships with others (team of developers, hardware architect, platform and cluster management, marketing team, external partners), as well as your ability to analyze and synthesize, will be essential to succeed in this position.

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Let’s grow together.