ASIC Verification Lead
Madrid, ES
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About Bull Bull is the Atos Group brand for high-performance computing, artificial intelligence and quantum innovations with 2,500 employees. Built on an open, end-to-end and trusted foundation, Bull designs, deploys and runs hardware and software while providing strategic services that unlock enterprise value, accelerate scientific research and drive society forward. Driven by world-class R&D with 1,500 patents, manufacturing capabilities and data science, Bull enables nations and industries to fully control their AI and data, advancing progress for the benefit of the planet.
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About Atos Group
Atos Group is a global leader in digital transformation with c. 63,000 employees and annual revenue of c. €8 billion, operating in 61 countries under two brands — Atos for services and Eviden for products. European number one in cybersecurity, cloud and high-performance computing, Atos Group is committed to a secure and decarbonized future and provides tailored AI-powered, end-to-end solutions for all industries. Atos Group is the brand under which Atos SE (Societas Europaea) operates. Atos SE is listed on Euronext Paris.
The purpose of Atos Group is to help design the future of the information space. Its expertise and services support the development of knowledge, education and research in a multicultural approach and contribute to the development of scientific and technological excellence. Across the world, the Group enables its customers and employees, and members of societies at large to live, work and develop sustainably, in a safe and secure information space
We are searching for an Asic Verification Lead to join Bull's dynamic team.
In this role, you will play a key part in verifying complex ASIC architectures used in Bull’s high‑end and exascale servers. You will drive verification strategy, lead UVM‑based methodologies, and work closely with architecture and design teams to ensure the reliability and performance of advanced semiconductor designs.
Responsibilities:
• Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams.
• Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications.
• Write and perform closely test plans with the logical design team.
• Develop coverage models and verification environments using UVM-SystemVerilog / C ++ • Monitor, analyze and debug simulation errors.
• Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time.
• Submit recommendations on tools and methodologies to develop to improve productivity.
• Mentor junior engineers on how to produce a maintainable and reusable code across projects.
What we're looking for:
Education:
• Experience: 8+ years
• Education: Bachelor's Degree (BE / BTech) or Master's Degree (ME / MTech)
Competences & Skills:
• Integrating ASIC functional verification team.
• ASIC developed include network controller, router and cache coherence controller targeting Bull high-end servers and Bull high-performance ("big data" and "exascale" servers).
• Using “Constraint-Random, Coverage Driven” functional verification methodologies underlying UVM verification framework to ensure full and effective verification of complex ASIC.
• Participated in the successful verification of a complex SoC or ASIC.
• Mastering UVM or equivalent verification methodology.
Location: Madrid or Barcelona (or remote within Spain)
Benefits:
• Flexible Work Schedule: Half day Fridays and an intensive summer workday supporting work life balance.
• Learning and Growth: Opportunities to work with advanced AI technologies in an innovative and supportive R&D environment.
Let’s grow together.