ASIC Verification Lead

About Atos Group

Atos Group is a global leader in digital transformation with c. 67,000 employees and annual revenue of c. €10 billion, operating in 61 countries under two brands — Atos for services and Eviden for products. European number one in cybersecurity, cloud and high performance computing, Atos Group is committed to a secure and decarbonized future and provides tailored AI-powered, end-to-end solutions for all industries. Atos Group is the brand under which Atos SE (Societas Europaea) operates. Atos SE is listed on Euronext Paris.

The purpose of Atos Group is to help design the future of the information space. Its expertise and services support the development of knowledge, education and research in a multicultural approach and contribute to the development of scientific and technological excellence. Across the world, the Group enables its customers and employees, and members of societies at large to live, work and develop sustainably, in a safe and secure information space.

About Eviden

Eviden is the Atos Group brand for hardware and software products with c. € 1 billion in revenue, operating in 36 countries and comprising four business units: advanced computing, cybersecurity products, mission-critical systems and vision AI. As a next-generation technology leader, Eviden offers a unique combination of hardware and software technologies for businesses, public sector and defense organizations and research institutions, helping them to create value out of their data. Bringing together more than 4,500 world-class talents and holding more than 2,100 patents, Eviden provides a strong portfolio of innovative and eco-efficient solutions in AI, computing, security, data and applications.

Eviden is searching for a Asic Verification Lead to join our dynamic team.

Responsibilities:

• Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams.

• Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications.

• Write and perform closely test plans with the logical design team.

• Develop coverage models and verification environments using UVM-SystemVerilog / C ++ • Monitor, analyze and debug simulation errors.

• Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time.

• Submit recommendations on tools and methodologies to develop to improve productivity.
• Mentor junior engineers on how to produce a maintainable and reusable code across projects.

What we're looking for:

Education:

• Experience: 8+ years
• Education: Bachelor's Degree (BE / BTech) or Master's Degree (ME / MTech)

Competences:

• Integrating ASIC functional verification team.
• ASIC developed include network controller, router and cache coherence controller targeting Bull high-end servers and Bull high-performance ("big data" and "exascale" servers).
• Using “Constraint-Random, Coverage Driven” functional verification methodologies underlying UVM verification framework to ensure full and effective verification of complex ASIC.

Skills:

• Participated in the successful verification of a complex SoC or ASIC.

• Mastering UVM or equivalent verification methodology.

Location: Madrid or Barcelona (or remote within Spain) 

Let’s grow together.